Efficient Reversible Multiplexer Design Using proposed AllOptical New Gate

نویسندگان
چکیده

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

New Design of Reversible Full Adder/Subtractor using R gate

Quantum computers require quantum processors. An important part of the processor of any computer is the arithmetic unit, which performs binary addition, subtraction, division and multiplication, however multiplication can be performed using repeated addition, while division can be performed using repeated subtraction. In this paper we present two designs using the reversible R gate to perform t...

متن کامل

DESIGN AND ANALYSIS OF 4:1 MULTIPLEXER USING AN EFFICIENT REVERSIBLE LOGIC IN 180nm

Multiplexer’s square measure is a typical building block for data-paths, and is used extensively in a variety of applications together with the processors. In this paper authors have proposed a 4:1 multiplexer using PFAL and ECRL adiabatic logic design technique and compared with the Conventional CMOS Multiplexer. The basic approaches that we used for reducing energy/power dissipation in conven...

متن کامل

New Efficient 2T and Gate Design

This paper proposes a new design of 2T AND gate. Performance comparison of proposed gate with existing 2T GDI technique is presented. Different methods have been compared with respect to the number of devices, power consumption, power-delay product, temperature sustainability and noise immunity in order to prove the superiority of proposed design over existing 2T gate design. The simulation has...

متن کامل

Design of Efficient Adder Circuits Using PROPOSED PARITY PRESERVING GATE (PPPG)

Reversible logic is becoming an important research area which aims mainly to reduce power dissipation during computing. In this paper we introduce a new parity preserving reversible gate PPPG (a 5x5 gate). This gate is universal in the sense it can synthesize any arbitrary Boolean function. It is also a parity preserving gate in which the parity of input matches the parity of the output. This p...

متن کامل

Design of Reversible/Quantum Ternary Multiplexer and Demultiplexer

In this paper, we show realization of macrolevel ternary reversible 2-qudit Feynman gate, 3-qudit controlled Feynman gate, and 3-qudit Toffoli gates using ternary reversible 1-qudit gates and 2-qudit Muthukrishnan-Stroud gates, which are theoretically realizable using quantum technology such as liquid ion trap [10]. Then we show the design of ternary reversible multiplexer and demultiplexer usi...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IOSR Journal of Electronics and Communication Engineering

سال: 2016

ISSN: 2278-8735,2278-2834

DOI: 10.9790/2834-1104014551